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Module 1 - System Architecture


System Basics
Module 1

SmartEdge Overview
Lesson 1-1

Lesson Objectives
Discuss SmartEdge hardware components Discuss SmartEdge packet handling Describe the SmartEdge OS architecture

Module 1: System Architecture

The SmartEdge Family
SmartEdge 800

2 Route Processors

SmartEdge series Different form factor Same line cards and route processors

4 line cards
SmartEdge 400

12 line cards
Hardware features Redundant Dual Route Processor Redundant power for every slot, redundant cooling

2 Route Processors

Hot swap for every card
Module 1: System Architecture

Power Distribution SmartEdge
SmartEdge 800 supports DC –48V Dual Feed SmartEdge 400 supports DC –48V and AC (converts to – 48V) Dual Feed Each card has separate(2x) power “converter” from –48V DC to applicable voltages (3.3V, 5V, etc)
Every card provides its own power

Module 1: System Architecture

SmartEdge Interface Support

Access Network

IP Backbone

SmartEdge: Diverse Interfaces
Optical ports/
slot OC-48/ STM-16 OC-12/ STM-4 OC-3/ STM-1 1 4 8

Channelized

ports/ slot

ATM
OC-12 ATM STM-4 OC-3 ATM STM-1 DS3 ATM

ports/ Copper ports/ Ethernet ports/ slot slot slot 1 4 12

ChOC-12/DS1 1/336 ChOC-12/DS3 Ch DS3/DS1 ChSTM-1/E1 2/24 12/336 3/189

DS-3 DS1 E1

12 28 24

10/100E 12 Gig E 4

Module 1: System Architecture

Control and Forwarding Plane
Strict separation of control and forwarding plane

Line Cards Packet forwarding functions High Performance Packet Processing ASICs (PPAs) 60 Gbps FD

Route Processors Route calculation on dedicated processors

Redundant Redundant IO Proc IO Proc Proc Proc

Route IO Route ProcessorProc Processor

622 Mbps control paths

Module 1: System Architecture

Non stop forwarding basics
Strict separation of control plane and forwarding plane results in supporting non-stop forwarding

Packets In

Packets Out

Packet forwarding continues, non-stop, in the absence of the processes that populate forwarding tables

X

Redundant Redundant IO Proc IO Proc Proc Proc

Route IO Route ProcessorProc Processor

Module 1: System Architecture

Packet Processing ASICs

PPA, Packet Processing ASIC Programmable for IP, MPLS and ATM / FR / Ethernet switching
Future proof and adaptable to new protocols and services Complete software control of packet services

Reprogram rather than deploy new hardware IP high-touch packet processing at multi-gigabit speeds

Module 1: System Architecture

Distributed forwarding
Strict separation of ingress and egress traffic processing, resulting in distributed forwarding
OC-48 line card
Incoming Packet Processing Forwarding look-up, access controls (ACLs), rate limiting, classification, marking etc Dedicated incoming packet processor on every line card

ATM or Gigabit line cards

Exit Packet Processing ACLs, queuing, scheduling, rate limiting Dedicated exit processor on every line card

Module 1: System Architecture

Packet mesh
Passive backplane Total exchange capacity is (2*(N-1)) multiplied by 2.5 Gbps, where N is number of slots
11

14 13 12 1 2

3

Insertion or removal to mesh does not cause interruption of forwarding
This is because of the dedicated links between each card

10 9 6 5

4

Module 1: System Architecture

System Architecture
5 PMA 5 Mesh Links (5 gig per link) 5 5

PMA

PMA

PMA

PPA 5 More Traffic Cards

PPA

PPA

PPA 5 More Traffic Cards

LTA

SCC

SCC

LTA

XCRP
SCC

Power PC

Power PC

Module 1: System Architecture

Ingress Packet Flow

PPA Memory 256 Mb

Ingress PPA

PMA

To/From Packet Mesh

SCC

SCL

Configuration/ Control

Line Termination ASIC Egress PPA PMA

To/From Packet Mesh

Module 1: System Architecture

Egress Packet Flow

Ingress PPA

PMA

To/From Packet Mesh

SCC

SCL

Configuration/ Control

Line Termination ASIC Egress PPA
PPA Memory 256 Mb

PMA

To/From Packet Mesh

Module 1: System Architecture

Transit Packet Flow
Ingress Transit Packet Egress Transit Packet

LTA

IPPA
Traffic Card A

PMA
Packet Mesh

PMA

EPPA
Traffic Card B

LTA

LTA
Egress Transit Packet

EPPA

PMA

PMA

IPPA

LTA
Ingress Transit Packet

Module 1: System Architecture

Other Packet Handling
Management/Control Path

LTA

IPPA

SCC

SCC

RP

ICMP

LTA
ICMP Request ICMP Response

IPPA

Module 1: System Architecture

Advanced Packet Handling
PPP LCP Echo

LTA

IPPA

PPP LCP Echo Request PPP LCP Echo Response

To be extended to more protocols whenever required
Full benefits of distributed programmable design Not depending on IP

Module 1: System Architecture

General Software Model
Software modularity with restartable protocols improves system and network availability
CLI, SNMP, other
Config Process

Process Manager

Each protocol is a separate process
Failure of one protocol does not affect other protocols Protocols can be stopped & restarted individually

BGP

IS-IS

PIM

OSPF Static

Database

Routing Information Base OS Kernel

Modularity simplifies development & test
Highly modular code is more stable and reliable

Module 1: System Architecture

Advantages of Modularity
One module fails, others continue to operate
OSPF crashes? RIB still operates – traffic still flows

Independent stop/restart of each module Efficient use of system resources
Only allocated to active processes

Easier to develop – easier to repair! Built on BSD
VERY stable multi-process environment Ability to use existing BSD technologies (with minor adjustments) to provide critical functionalities
Memory management Process Scheduling
Module 1: System Architecture

Inter process communications

Each process talks to each other by using a Redback proprietary version of IPC (standard UNIX Inter Process Communications) Unlike UNIX IPC, Redback IPC is connection-orientated (compare between UDP and TCP) Throttle mechanisms in kernel to adapt to load Several “core” processes exist which function like “informationhub-and-spoke” servers, for example RIB

BGP RIB IS-IS

Static

OSPF

Module 1: System Architecture

System Booting
The chassis boots cards from slot 1 to slot 14 Best practice guideline is to put backbone facing cards in lower slots and subscriber facing cards in higher slots Accelerates booting time and session setup start time

Boot Order
Module 1: System Architecture

Any Questions?

Module 1: System Architecture

SmartEdge Concepts and Terminology
Lesson 1-2

Lesson Objectives
Discuss terminology and definitions Explain binding

Module 1: System Architecture

SmartEdge Terms and Definitions
Context Interface Port Channel PVC Circuit Bind
pos 1/1 chan 2/1 atm 3/1 eth 4/1 interface foo

context MyRouter

interface bar

Module 1: System Architecture

Interrelationships

10.1.1.0/24

pos 1/1 pos 1/2 chan 2/1 eth 3/1

interface foo ip address 10.1.1.1/24

context MyRouter

192.168.4.0/24

interface bar ip address 192.168.4.1/24

Module 1: System Architecture

Multiple Contexts
Independent routing domains
Separate address spaces Separate forwarding tables Separate administrative environments ISP1
context ISP1

Allows multiple networks/services to be accessed from one SmartEdge

ISP2

context ISP2

Module 1: System Architecture

Configuration Principles
System
All global parameters: hostname, SNMP, logging

Context
All layer 3 parameters: interfaces, routing configuration

Port
Layer 1 & 2 parameters, channels, bindings

Module 1: System Architecture

Exercise: Terminology
Match the terms with their definitions:

A C D B

Port Interface Circuit Context

A: Layer 1-2 connection to SmartEdge B: Virtual router/domain C: Layer 3 subnet configuration D: Individual connection to a single destination

Module 1: System Architecture

Any Questions?

Module 1: System Architecture


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