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AlGaN GaN HEMTs on Epitaxies Grown on Composite Substrate

Proceedings of the 2nd European Microwave Integrated Circuits Conference

AlGaN/GaN HEMTs on Epitaxies Grown on Composite Substrate
V. Hoel, S. Boulay, H. Gerard, V. Rabaland, E. Delos, J.C. De Jaeger #1, M.A.Di-Forte-Poisson, C. Brylinski#2 H. Lahreche, R. Langer, P. Bove#3
IEMN/TIGER, UMR-CNRS 8520, USTL, Avenue Poincaré,59652 Villeneuve d’Ascq cedex-FRANCE jean-claude.dejaeger@iemn.univ-lille1.fr #2 III-V Lab/TIGER, Route de Nozay, 91461 Marcoussis CEDEX-FRANCE #3 PICOGIGA INTERNATIONAL, Place Marcel Rebuffat, Parc de Villejust, 91971 Courtaboeuf cédex7-FRANCE Abstract—In this paper, are presented the first results obtained from AlGaN/GaN HEMTs devices processed on both MBE and MOCVD epitaxial structures grown on “composite” substrates. These substrates are based on innovative structures in which a thin Si or SiC single crystal layer is transferred on top of a thick polycrystalline SiC wafer with a thin SiO2 intermediary insulating layer. The fabrication of the transistors is based on the process flow developed by “TIGER” for HEMT epitaxy on SiC bulk substrates. The obtained results show the capabilities of such composite devices, providing HEMT device electrical and small signal microwave performance similar to those obtained currently on bulk single crystal SiC substrates. The composite substrate approach appears as very promising for applications requiring low cost microwave power devices, such as mobile communications.
#1

semi-insulating <0001> Si-face 4H or 6H on-axis SiC single crystal surface with the high thermal conductivity (300W/K.m) of inexpensive polycrystalline SiC, therefore providing a significant improvement of the global material cost while keeping the same level of HEMT device electrical performance for similar channel temperature. Single crystal Si on polycrystalline SiC ( SopSiC ). The silicon seeding layer is available with large diameter, and almost perfect crystal ordering, from low cost highly reproducible wafers allowing the manufacturing of GaN HEMT devices on large diameter wafers, while the polycrystalline SiC provides significantly improved thermal conductivity as compared to bulk silicon (x2). This approach can be dedicated to large volume applications. III. EPITAXY The AlGaN/GaN epitaxial stack can be grown onto the composite substrates using any of the two main techniques available for III-N HEMT epitaxy : MBE (Molecular Beam Epitaxy) [3] and MOCVD (Metal Organic Chemical Vapour Deposition) [4]. The usual stack used for growth on bulk single crystal substrates consists in: (1) a complex seeding layer, (2) a thick GaN buffer layer (>500nm) followed by (3) a thin AlGaN layer (typically 25-30 nm). The same kind of stacking has been used for growing our HEMT epitaxial stacks on composite substrates. IV. DEVICE PROCESSING The device processing is based on optical lithography. The gate length is 1, 2 or 3 μm. The source-gate distance is 1.5μm and the gate to drain distance is 2 μm. The masks set includes transistors with width of 2x50μm, 2x100μm, 2x150μm and 2x200μm. Specific patterns are also available for the characterisation of the substrate. The transistor fabrication process flow is derived from the one developed at “TIGER” for the fabrication of transistors on

I. INTRODUCTION AlGaN/GaN High Electron Mobility Transistor (HEMT) prototypes for microwave power amplification are usually fabricated from epitaxial stacks on sapphire, silicon carbide or silicon substrate. Today, single crystal semi-insulating silicon carbide (4H or 6H) is the most suitable substrate material owing to its lower mismatch with GaN and very good thermal conductivity (450W/K.m), although it is still very expensive. Therefore, many intense research programs, world wide, aim at using lower cost substrates, such as silicon, together with good enough performance for low cost applications such as wireless communication systems [1-2]. Recently, progress on substrate engineering has provided new alternative technological approaches based on composite substrates. This paper reports on the fabrication and characterisation results of AlGaN / GaN HEMT device fabricated on two types of composite substrates, both made of a thin single crystal layer transferred onto a thick polycrystalline silicon carbide base, using a variant of the SOITEC “Smart CutTM” process. For ”SopSic” composite substrates the top layer crystal is <111> silicon, while for “SiCopSiC”, it is <0001> silicon carbide. II. COMPOSITE SUBSTRATES Single crystal SiC on polycrystalline SiC (SiCopSiC). This structure combines the unique seeding properties of

978-2-87487-002-6 ? 2007 EuMA

100

October 2007, Munich Germany

bulk single crystal SiC or Si substrates [5]. The main device processing steps are the following:
Drain current (mA)

50 VGS = 0V VGS = - 1V VGS = - 2V VGS = - 3V VGS = - 4V

40

? ?

? ? ? ?

Wafer cleaning using Nitric and Hydrochloric Acid; Ohmic contacts. The metallization used is Ti/Al/Ni/Au (12nm/200nm/40nm/100nm) followed by 30s annealing at 900°C under nitrogen atmosphere; Isolation of transistors, performed by He+ Implantation, Rectangular Mo/Au gates metallisation and patterning, SiO2 / SiN passivation (100nm/50nm) stack is deposited by PECVD, After passivation opening, the thick interconnection Ti/Au metallisation is evaporated and patterns by lift-off.

30

20

10

0 0 5 VDS (V) 10 15

Fig.2 DC current voltage characteristics for a MBE / SiCopSiC transistor.

First initial results were obtained on a prototype MBE / SopSiC structure, yielding a maximum drain source courant of 250mA/mm. This rather low value mainly originates from poor ohmic contacts coming from material specificities. An improvement of the ohmic contacts was obtained by adding an etching step, performed either by in-situ Ar+ ion beam in the evaporator, or by CH4/H2/Ar plasma etching. The DC I-V measurements after ohmic contacts improvements, presented figure 1, demonstrate encouraging results. The drain current curves are measured on devices before passivation. The gate bias starts with VGS=0V and varies by 1V step to the pinch-off. Furthermore, the device demonstrates good pinch-off voltage characteristics.
Ids (mA/mm) 500 400 300 200 100 0 0 20 40 Vds (V) 60

The growth conditions were identical to those used on bulk single crystal SiC substrates. The DC, microwave and power characterisation are presented in the following paragraphs. V. CHARACTERISATION Hall measurements were carried out at room temperature, at different locations on the wafer (table 1). The values of R , Ns, and are identical to those routinely obtained on bulk SiC substrate. Measurements were also performed on TLM patterns, processed with standard ohmic contacts process flow (table 2). The average resistance Rc is 0.11 .mm with a contact resistivity c of 2.65 10-7 .cm2. Those results are at the state-of-art level and identical to those usually obtained on bulk SiC substrate. The I-V characteristics exhibit symmetrical saturation, good linearity, and they are uniform over the whole epilayer. The sheet resistance R values deduced from the TLM method are in good agreement with those obtained from eddy current measurements.
1 R (Ohm) μ (cm?/V.s) Ns (/cm?) 442 1930 7.3 1012 2 458 1870 7.29 1012 3 474 1920 6.8 1012

0V -1V -2V -3V

Fig.1 DC current voltage characteristics for a MBE / SopSiC transistor (gate bias ranging from -4V to 0V).

Table.1 Hall measurements on MOCVD epitaxy on SiCopSiC

MBE standard epitaxial wafer on SiCopSiC substrate was also processed. For ohmic contacts, in-situ argon etching (2mn, 300eV) was performed in the evaporator before metallization, giving a good behaviour. DC I-V characteristics were measured under probes before passivation (Fig.2). The drain current density, measured at VGS=0V before device passivation, is 470mA/mm for a 2x50μm transistor, which is a good value for Lg=1μm gate length. It may be even improved after device passivation. The good pinch-off behaviour shows the quality of the epitaxial buffer and underlying substrate. Two MOCVD epitaxial AlGaN/GaN HEMT wafers on SiCopSiC substrate were also processed.

d(μm) 5 10 15 20 Rc (Ohm.mm) R (Ohm)
c

R1 22.44 43.61 64.87 85.08 0.09 418

R2 24.27 44.37 62.72 84.48 0.21 397

R3 25.78 48.30 71.07 98.84 0.03 483

R average 24.16 45.43 66.22 89.47 0.11 433 2.65E-07

(Ohm.cm2)

Table.2 Ohmic contact results on MOCVD epitaxy on SiCopSiC

Isolation voltage handling was also evaluated. For a 5μm spacing, the current is around 30μA/mm at 150V. This result

101

demonstrates the good isolation between devices provided by straight He+ implantation.
VGS (V) 0 1,E-01 0,5 1 1,5 2 2,5 5,0E-03

For a 2x100μm transistor with Lg = 1 μm, the maximum current IDS at VGS = 0V reaches 565 mA/mm for -3.5V pinchoff voltage, and the maximum transconductance is 163 (mS/mm) (Fig.6).
Gm(mS/mm) 180 160 140

1,E-03

4,0E-03

IG (A)

IG (A)

1,E-05

3,0E-03

120 100 80 60 40 20 0

1,E-07

2,0E-03

1,E-09

1,0E-03

1,E-11

0,0E+00

-4,5

-4

-3,5

-3

-2,5

-2 Vgs(V)

-1,5

-1

-0,5

0

Fig.3 Schottky forward I-V characteristic

Fig.6 Transconductance for a MOCVD/SiCopSiC device

Figures 3 and 4 represent the current-voltage characteristics of Schottky contacts under forward and reverse conditions, typical of a good behaviour of the Schottky barrier, with particularly low reverse leakage current. The reverse current is close to 30nA/mm at 30V, the barrier heigh B and the ideality factor are respectively B =1.06 eV and = 1.4.
VGS (V) -10 -8 -6 -4 -2 0 0

S parameters were also measured versus frequency for a 2x100μm transistor with Lg = 1 μm. The current gain H21 is 13dB at 2.5 GHz (Fig.7). The current gain cut-off frequency Ft is 12GHz associated to Fmax = 38GHz (extrinsic values). These first results are encouraging and Fmax value is close to those currently obtained on transistors with similar structure processed on bulk single crystal SiC substrate. A good Ft/Fmax ratio over 2 and a good scaling for different gate lengths are observed.
|H21| (dB) at VDS = 10 V

-5 IG (nA)

-10

40 30 20 10 0 -10 1,0 10,0
Freq (GHz)

-15

-20

Fig.4 Schottky contact reverse I-V characteristics

As an illustration, figure 5 shows the current-voltage characteristics for a 2x50μm2 transistor with Lg =2 μm. The maximum current IDS at VGS = 0V is high: 410 mA/mm, and the maximum transconductance is 135 mS/mm. Again, the device exhibits excellent pinch-off behaviour and very smooth dependence of the transconductance with VGS.
VGS = 0V 400

100,0

Fig.7 Extrinsic cutoff frequency Ft of a 200*1 μm? at VDS= 10V.

IDS (mA/mm)

300 VGS = -1V

200

VGS = -2V 100 VGS = -3V 0 0 5 VDS (V) 10

Fig.5 Drain source current-voltage characteristics for a MOCVD/SiCopSiC device

Pulse measurements were carried out in order to study the trapping effects. The DC pulsed characteristics are presented figure 8 for transistor based on SiCopSiC MOCVD substrate and figure 9 for transistor based on SiCopSiC MBE substrate. All quiescent bias points are chosen to simultaneously eliminate the thermal effect and to reveal the gate and drain lag effects. The pulse IDS-VDS characteristics determined at the quiescent point (VDS0=0V, VGS0=pinch-off voltage) are compared to the IDS-VDS reference in order to analyze the gate lag effect. On the same figure, the pulse IDS-VDS characteristics determined at the quiescent point (VDS0=10V, VGS0=-4V) for MOCVD SiCopSiC and (VDS0=15V, VGS0=-4V) for MBE SiCopSiC are presented in order to point up the drain lag effect. In these both conditions and for the two types of structures MOCVD and MBE SiCopSiC substrates, a decrease of the maximum drain current density is observed. The too high lag effects observed on this first result must be improved from the device passivation or the device epilayer.

102

Vds0=0V,Vgs0=0V 0.12

Vds0=0V,Vgs0=-4V

Vds0=10V,Vgs0=-4V

Pout, Gp et PAE en fonction de Pabs, VDS=10V, VGS=-1.5V pour Gload=0.66_25deg.
25 50

0.1
20 40

Ids(A)

Pout (dBm), Gp (d

0.08 0.06 0.04 0.02 0 0 5

15

30

PAE (%

Pout G p PAE

10

20

5

10

0

0 -6 -4 -2 0 2 Pabs (dBm) 4 6 8 10

Vds(V)

10

15

Fig.8 DC pulsed I-V characteristics of a 2*100*1 μm? MOCVD on SiCopSiC with three quiescent bias points. Vgs swept from -4V to 0V by step of 1V

Fig.10 Power characteristics at F=4GHz for a 2x100x1 μm2 transistor (VDS=10V, VGS=-1.5V).

0.16 0.14 0.12 0.1 Ids(A 0.08 0.06 0.04 0.02 0 0 5 10 Vds (V) 15 20 25 Vds0=0V,Vgs0=0V Vds0=0V,Vgs0=-4V Vds0=15V,Vgs0=-4V

VII. CONCLUSIONS This paper shows the first results obtained on AlGaN/GaN HEMTs devices processed on epitaxy grown on SopSiC and SiCopSiC composite substrates. The process of epitaxies on composite substrates needs practically the same know-how than those on standard substrates. The transistors behaviours in DC and RF small signals are identical to those observed on similar devices processed on bulk SiC substrates, demonstrating the usability of composite substrates for AlGaN/GaN HEMT fabrication. The process will be improved to avoid lag effects and to get high microwave power. The results are very promising for the fabrication of low cost high power microwave transistors for wireless communication systems. ACKNOWLEDGMENT The authors would like to thank the European Commission for its support under the HYPHEN project. (IST contract n°027455). REFERENCES
[1] D. DUCATTEAU, A. MINKO, V. HOEL, E. MORVAN, E. DELOS, B. GRIMBERT, H. LARECHE, P. BOVE, C. GAQUIERE, J.C. DE JAEGER and S.L. DELAGE, “Output power density of 5.1W/mm at 18 GHZ with an AlGaN/GaN HEMT on Si substrate,” IEEE Electron Device Lett., vol. 27, pp. 7-9, Jan. 2006. D.C. DUMKA, C. LEE, H.Q. TSERNG, P. SAUNIER and M.KUMAR, “AlGaN/GaN HEMT’s on Si SUBSTRATE with 7W/mm output power density at 10 GHz,” Electron. Lett., vol.40, n° 16, pp.1023-1024, Aug. 2004. H. LAHRECHE, B. FORE, C. RICHTARCH, F. LETERTRE, R. LANGER and P. BOVE, “Progress in wicrowave GaN HEMT grown by MBE on Silicon and smart cut/spl trade/engineered substrates for high power applications,” European EGAAS 2005, pp.369-371, Oct. 2005. M.A. DI FORTE POISSON, M. MAGIS, M. TORDJMAN, R. AUBRY, M. PESCHANG, S.L. DELAGE, J. DI PERSIO, B. GRIMBERT, V. HOEL, E. DELOS, D. DUCATTEAU and C. GAQUIERE, “LP-MOCVD growth of GaAlN/GaN heterostructures on Silicon Carbide. Application to HEMT’s devices” Proceedings of MRS Fall Meeting, Boston, 2003. E. MORVAN, B. GRIMBERT, V. HOEL, N. CAILLAS, M.A. DI FORTE POISSON, C. DUA, R. AUBRY, D. DUCATTEAU, E. DELOS, J.C. DE JAEGER and S.L. DELAGE, “TIGER AlGaN/GaN HEMT technology” GAAS 2004, Amsterdam, Oct. 2004.

Fig.9 DC pulsed I-V characteristics of a 2*150*1 μm? MBE on SiCopSiC with three quiescent bias points. VGS swept from -4V to 0V by step of 1V

VI. LARGE SIGNAL CHARACTERIZATION Large signal power measurements were performed in continuous wave (CW) under probes at 4 GHz, using an automatic active load pull system developed in our laboratory. Figure 10 presents the power gain, the power added efficiency (PAE), and the output power versus the device absorbed input power. The results are plotted for a 200-μm HEMT with Lg = 1μm for the MOCVD on SiCopSiC substrate. At the bias point VDS =10V and VGS =-1.5V, under class A operation, an output power density of 0,4W/mm, a maximum PAE of 29% and a linear gain of about 15dB are achieved by the selected device at the maximum output power. These results can be predicted from the pulse I-V characteristics determined at device operating conditions. The large signal power measurement was also performed at the bias point VDS =20V and VGS =-1.5V, under class A operation. An output power density of 0,6W/mm, a maximum PAE of 21% and a linear gain of about 14dB are achieved. This small power increasing versus VDS is correlated to the drain lag effect. Furthermore some transistors instabilities are observed when VDS = 20V. If these performances are far from the power density commonly obtained on the usual substrates by TIGER laboratory [1;5], the results are promising and will be improved in the future.

[2]

[3]

[4]

[5]

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