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GL852


5

4

3

2

1

History
VER 1.00 2006/08/09 First formal release. VER 1.10 2007/03/11 1. Modify Reset circuit

D

D

C

C

GL850G/GL852 48pin HUB chip version and schematic option GL850G
B

1. Remove regulator U3 2. Remove R1,R4,R13,R15,R16,R17,R24,R27,R34,R37 resistor.
B

GL852

1. must mount regulator U3 2. Remove R2 resistor.

A

GENESYS LOGIC, INC.
Title Size B Date:
5 4 3 2

A

GL852/GL850G Chip & EX_CPU
Document Number Rev

USB2.0 4-Port Hub Controller
Sunday, March 11, 2007 Sheet
1

1.10
of 3

1

5

4

3

2

1

DGND

VCC

VCC

AVDD AVDD AVDD1 AVDD3 AVDD4 AVDD2 AVDD3 AVDD4 AVDD5 AVDD

DVDD DVDD DVDD1 DVDD2 DVDD3 DVDD4 DVDD5 DVDD

OVCUR1

D

0

0

PSELF

GL850G: Remove R1 GL852 : Remove R2

R1 R2

D

C1 0.1uF

C2 0.1uF

C3 0.1uF

C4 1uF

C5 0.1uF

C6 1uF

C7 0.1uF

C8 0.1uF

C9 0.1uF

C10 0.1uF

C11 0.1uF

C12 0.1uF

PAMBER1 PGREEN1 DVDD4

OVCUR1

GL852/GL850G

R3 10K RESET DVDD1 RESET

680R 1% RREF

DM0 DP0 DM1 DP1 DM2 DP2

C

AVDD1 AGND DM0 DP0 DM1 DP1 AVDD2 AGND DM2 DP2 RREF AVDD3

DVDD5/V33 DGND/VCC PAMBER1 PGREEN1 DVDD4 PWREN1# OVCUR1# PWREN2# OVCUR2# PGANG DVDD3 PSELF

48 47 46 45 44 43 42 41 40 39 38 37

U1

PGANG DVDD3 PSELF

DVDD5

As close to GL852/GL850G

AGND3 X1 X2 AVDD4 DM3 DP3 AVDD5 AGND4 DM4 DP4 PGREEN4 PAMBER4

R5

1 2 3 4 5 6 7 8 9 10 11 12

AVDD1 AGND1 DM0 DP0 DM1 DP1 AVDD2 AGND2 DM2 DP2 RREF AVDD3

PAMBER2 PGREEN2 DVDD2 PAMBER3 PGREEN3 PWREN3# OVCUR3# PWREN4# OVCUR4# TEST RESET# DVDD1

36 35 34 33 32 31 30 29 28 27 26 25

PAMBER2 PGREEN2 DVDD2 PAMBER3 PGREEN3

X1

R4 1M U2 X1 1 2 12MHz C14 20P C15 20P PAMBER1 PGREEN1 PAMBER2 PGREEN2 1 2 3 4 EE_CS EE_SK EE_DI EE_DO VCC NC2 NC1 GND 8 7 6 5 DVDD
C

X2

B_VCC

93C46-SMD

C13 1uF

R18 47K

DM3 DP3

DM4 DP4

AGND X1 X2 AVDD4 DM3 DP3 AVDD5 AGND DM4 DP4 PGREEN4 PAMBER4

13 14 15 16 17 18 19 20 21 22 23 24

NOTE: PLEASE MAKE SURE THE EEPROM CAN WORK AT 3.3 V

A PGREEN1

A PGREEN2

A PGREEN3

A PAMBER1

A PAMBER2

Ganged Mode
DVDD

LED1 A
B

LED2 GREEN C C

LED3 AMBER C

LED4 GREEN C

LED5 AMBER C

LED6 GREEN C

LED7 AMBER C

A PGREEN4 LED8
B

A PAMBER3

AMBER LED9 PWR_LED C

A PAMBER4

GREEN

R6 100K C PORT1 R7 470R PGANG R8 470R PORT2 R9 470R DGND PORT3 R10 470R PORT4 R11 470R

A

GENESYS LOGIC, INC.
Title

A

GL852/GL850G Chip & EX_CPU
Size B Date:
5 4 3 2

Document Number

Rev

USB2.0 4-Port Hub Controller
Monday, March 12, 2007 Sheet
1

1.10
of 3

2

5

4

3

2

1

B_VCC

LB1 FB G1 1 2 3 4 G2

UPPORT1 HAND1 LB2 VCC DD+ GND HAND2 USBB-A

DM0 DP0

FB
D

D

J1 DC JACK

POWER CIRCUIT
NOTE: PLEASE USE 5V POWER SWITCH ADAPTER
VCC VCC Q1 FDN338P C20 0.1uF S_VCC C17 R12 510K PSELF PSELF I P U3 AME8805 VIN1 VIN2 ADJ VOUT O V33

DVDD DVDD LB3 FB

AVDD LB4 FB AVDD VDP1

DOWN1 G1 R13 15K 15K HAND1 VCC DD+ GND HAND2 USBA-A LB5 FB VDP2

+
C18 0.1uF EC1 10uF

2 3 1

C16 0.1uF

S_VCC

+
EC3 10uF B_VCC

S

R14 4.7K

1uF

+
EC2 100uF

G

C19 DM1 0.1uFDP1

R15

1 2 3 4 G2

PSELF

D

3.3V Regulator

G

EC1 close to U1 pin48

C

DOWN2 G1 R16 15K HAND1 VCC DD+ GND HAND2 USBA-A F1 1 6V 2A R24 15K 15K 2 VCC VDP3 DOWN3 G1 HAND1 VCC DD+ GND LB6 FB

C

+
EC4 100uF

C21 DM2 0.1uFDP2

R17 15K

1 2 3 4 G2

VDP1 VDP2 VDP3

+
VDP4 EC5 100uF R22 5.1K OVCUR1 LB7 FB R25 10K VDP4

C23 DM3 0.1uFDP3

R27

1 2 3 4 G2

B

B

HAND2 USBA-A

DOWN4 G1 HAND1 VCC DD+ GND HAND2 USBA-A

+
EC6 100uF

R34 C25 DM4 0.1uFDP4 R37

15K 15K

POLY-FUSE CIRCUIT

1 2 3 4 G2

A

GENESYS LOGIC, INC.
Title

A

GL852/GL850G Power
Size B Date:
5 4 3 2

Document Number

Rev

USB2.0 4-Port Hub Controller
Monday, March 12, 2007 Sheet
1

1.10
of 3

3


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