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ISL6558EVAL2 - Low-Profile, 5V/12V Input, 500kHz, and 90% Efficiency DC/DC Converter
Application Note April 4, 2006 AN1044.2
Author: Chun Cheung

Introduction
The changing computer performance landscape has brought about the need for flexible power solutions. Peripheral performance continues to increase as higher speed bus interfaces are made available. Router designs continue to grow in complexity as on-board processors perform more functions within a limited board space while continuing to increase the speed of data transfer. This places higher power density requirements on the DC/DC converters which supply them. Intersil’s Endura? multi-phase controllers (HIP63xx and ISL65xx) and synchronous-rectified buck MOSFET drivers (HIP66xx and ISL66xx) are suitable for the interleaved DC/DC buck converter implementation, as shown in Figure 1, and provide superior performance solutions with their space economical MLFP packages.
Q1 Lo Q2 Q1 VIN Lin Q2 Cin Lo

Intersil’s ISL6558 and ISL6609
The ISL6558 controller, coupled with ISL6609 singlechannel driver ICs, forms the basic building blocks for applications which demand high current, rapid load transient response, and high efficiency performance at high switching frequency within a limited board area and height. The ISL6558 regulates output voltage and balances load currents for two to four synchronous-rectified buck converter channels; its internal structure is shown in Figure 2. The internal 0.8V reference allows output voltage selection down to that level with a 1% system accuracy over temperature. The current-channel balance loop provides good thermal balance among all phases. Output voltage droop or active voltage positioning is optional. Overvoltage and overcurrent monitors and protection functions of the IC provide a safe environment for the microprocessor or other load. The controller is available in a 16-lead SOIC package and a 5x5mm2 20-lead MLFP package with some space savings. For more detailed descriptions of the ISL6558 functionality, refer to the device datasheet [1]. The ISL6609 is a 5V driver IC capable of delivering up to 4A of gate current for rapidly switching both MOSFETs in a synchronous-rectified bridge; its internal structure is shown in Figure 2. It is especially designed for voltage regulators that require high efficiency performance at high switching frequency within a limited board space. The ISL6609 accepts a single logic input to control both upper and lower MOSFETs. Its Tri-State? feature, working together with Intersil’s Multi-Phase PWM controllers, helps prevent a negative transient on the output voltage when the output is being shut down. This eliminates the Schottky diode that is used in some systems for protecting the microprocessor from reversed-output-voltage damage. Furthermore, adaptive shoot-through protection is implemented on both switching edges to provide optimal dead time and minimize conduction losses. Bootstrap circuitry permits greater enhancement of the upper MOSFET. The driver is available in a 8-lead SOIC package and a space economical 3x3mm2 8-lead MLFP package. For a more detailed description of the ISL6609, refer to the device data sheet [2].

Vo
Co

Q1 Lo Q2

FIGURE 1. MULTI-PHASE INTERLEAVED BUCK CONVERTER

This application note first gives a brief introduction of Intersil’s four-phase controller ISL6558 and synchronousrectified driver ISL6609. A summary of the ISL6558 and ISL6609 based design follows. The experimental results for a low-profile 5V-to-1.35V@30A, 500kHz, and 90% efficiency converter in two-phase operation using the interleaved approach and with their space economical MLFP package ICs are discussed. The evaluation board can be pushed up to 80A in four-phase operation, or modified for 12V input applications by replacing the input capacitors with higher voltage rating capacitors. Term Definitions, Reference, Schematics, Bill of Materials, and Layout are included at the end of this application note.

1 http://oneic.com/

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright ? Intersil Americas Inc. 2003, 2006. All Rights Reserved Endura? is a trademark of Intersil Americas Inc. | Tri-State? is a registered trademark of National Semiconductor Corp.

Application Note 1044
PGOOD

ISL6558

VCC

VSEN X 0.9

UV + S + X1.15 OV + OV LATCH R

POWER-ON RESET (POR)
TRI-STATE?

CLOCK AND SAWTOOTH GENERATOR

FS/EN


+

+ PWM -

PWM1

SOFTSTART AND FAULT LOGIC COMP


+

+ PWM -

PWM2


-

+ PWM -

PWM3

0.8V REFERENCE + E/A -

+


-

+ PWM PHASE NUMBER

PWM4

FB DROOP ITOTAL
+ +

CURRENT CORRECTION

CHANNEL DETECTOR DETECTOR

ISEN1 ISEN2 ISEN3 ISEN4

+ OC


+ +

-

ITRIP

GND

ISL6609

VCC EN VCC PWM 20K CONTROL LOGIC SHOOTTHROUGH PROTECTION VCC

BOOT UGATE PHASE

20K

LGATE GND

FIGURE 2. SIMPLIFIED ISL6558 AND ISL6609 INTERNAL STRUCTURE

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AN1044.2 April 4, 2006

Application Note 1044 Summary of Design
Table 1 summarizes the specifications of a power converter for mid-range router applications. The ISL6558 and ISL6609 based evaluation board has been designed to meet these criteria.
TABLE 1. ISL6558EVAL2 SPECIFICATIONS PARAMETER Input Voltage Output Regulation Transient Regulation Continuous Load Transient Slew Rate Over Current Minimum Airflow Channel Switching Frequency Efficiency 25°C with 200LFM 25°C with No Airflow Undervoltage Rising Threshold Undervoltage Falling Threshold Overvoltage Threshold 25°C with 200LFM CONDITION VIN 0.1% R16 and R19 6.5A Step 200A/?s 25°C with 200LFM MIN 4.5V 1.336 Vo 20mV 30A 200A/?s 43A 0 LFM 500kHz ELEMENTS 89.7% 89.3% 0.92Vo 0.9Vo 1.15Vo TYP 5V 1.35 MAX 5.5V 1.365 Vo + 20mV TABLE 2. CRITICAL DESIGN PARAMETERS (Continued) PARAMETER CONDITIONS VALUE UNIT

OUTPUT INDUCTORS (ASSUMING EQUAL DISTRIBUTION AMONG OUTPUT INDUCTORS) ILo,PP IPP ILo,Peak ILo,RMS Lo(Io) = 0.3?H, VIN = 5.5V Lo(Io) = 0.3?H, VIN = 5.5V, N = 2 Lo(Io) = 0.3?H, VIN = 5.5V Lo(Io) = 0.3?H, VIN = 5.5V UPPER FETs IQ1,RMS Lo(Io) = 0.3?H, VIN = 4.5V LOWER FETs IQ1,RMS Lo(Io) = 0.3?H, VIN = 5.5V 13.04 A 8.48 A 6.88 4.65 18.44 15.13 A A A A

Table 3 summarizes a rough power dissipation analysis for the referenced design.
TABLE 3. FULL-LOAD POWER DISSIPATION BUDGET POWER DISSIPATION AT 30A LOAD 4.5V 5.0V 5.5V

CALCULATION CONDITIONS Switching Frequency Per-Channel Output Inductor Number of Active Channels 500kHz 0.3?H at Full load N=2

PER-CHANNEL LOSSES (xN) Upper FETs Conduction Upper FETs Switching Lower FETs Conduction Lower FETs Body-diode Conduction Output Inductor Copper Output Inductor Core (Estimated) Per-Channel Driver 0.395W 0.461W 0.333W 0.233W 0.123W 0.036W 0.305W OTHERS (x1) Input Inductors Copper 0.055W 0.044W Negligible 0.273W 0.0035W 0.078W 0.196W 0.32W 4.655W 0.287W 0.0048W 0.078W 0.184W 0.28W 4.688W 0.291W 0.0061W 0.078W 0.176W 0.29W 4.737W 0.037W 0.356W 0.516W 0.328W 0.232W 0.123W 0.0.036W 0.375W 0.323W 0.572W 0.340W 0.231W 0.123W 0.036W 0.454W

Table 2 shows the calculation results of critical design parameters for the reference design, a two-phase interleaved DC/DC buck converter.
TABLE 2. CRITICAL DESIGN PARAMETERS PARAMETER CONDITIONS VALUE UNIT

DUTY CYCLE AND SWITCHING FREQUENCY D Fsw VIN = 5, Vo = 1.35 RT = 51.1k? (measured) INPUT INDUCTOR AND CAPACITORS Cin (min) IIN,RMS Lin (min) Io = 30A, N = 2, ?VIN,CAP = 20mV VIN = 5.5V, Io = 30A Cin = 180?Fx3, dIin/dt = 0.1A/?s OUTPUT CAPACITORS Co(min) IoRMS ESR(max) fc = Fsw/5 = 100kHz, f(Istep) = 20mV Lo(Io) = 0.3?H, VIN = 5.5V Istep = 6.5A, f(step) = 20mV 517 1.34 3.07 ?F A m? 180 7.63 300 ?F A nH 28.3 500 % kHz

Input Inductors Core Input Capacitors Output Capacitors Controller PCB Copper Miscounted and Error TOTAL

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AN1044.2 April 4, 2006

Application Note 1044 Experimental Results
The ISL6558EVAL2 evaluation board as configured is capable of 30A continuous load current and handling 200A/?s or higher speed load transients. The evaluation board meets the design specifications indicated in Table 1. Table 4 summarizes the equipment that was used for the performance evaluation.
TABLE 4. EQUIPMENT LIST Equipment Boards Used Power Supplies EQUIPMENT DESCRIPTIONS ISL6558EVAL2 Rev. A, #1 and #2 1. Hewlett Packard 6653A, 35V, 15A. S/N: 3621A-03425 LeCroy LT364L. S/N: 01106 Fluke 8050A. S/N: 2466115 & 3200834 1. Chroma 63103. S/N: 631030002967 2. Chroma 63103. S/N: 631030003051 LeCroy AP015. SN: 3293

? If there is sufficient airflow, use a single LPAK Hitachi HAT1264 for the upper FET and two SO-8 Siliconix Si4842DYs for the lower FETs in each channel; but it comes with the penalty of 1% lower efficiency, as shown in Table 5. Note that the current sense resistors (R2 and R17) need to be adjusted to get a proper over current setpoint. ? For 12V input operation, the jumper JP1 should be removed to prevent the controller and drivers from overvoltage damage. A 5V supply is required to power up the controller and the drivers; the diode D1 is to protect both the drivers and controller from reversed-bias damage. The 12V supply should be applied prior to the 5V; otherwise, the output voltage will lack soft-start and cause an over overcurrent or overvoltage at the output. Furthermore, the input capacitors should be replaced with higher voltage rating (16V or above) capacitors. In addition, the compensation gain (R11) should be scaled by 5/12 for system stability with a reasonable phase margin. ? Any change of the output filter will require the compensation network to change for an optimum transient response. If very lower ESR capacitors are used at the output, a type III compensation network is required to boost up the phase for a better transient performance. ? The feedback resistor (R19) can cause some delay in the soft-start interval, as discussed in the ISL6557A data sheet section SOFT-START [3]. It should not be a very high impedance resistor. EFFICIENCY The efficiency data, as plotted in Figure 3, are taken with a PAPST-MOTOREN TYP 4600X fan turned on 8” away from the input end of the evaluation board at room temperature (approximate 200LFM). This figure shows that the converter operates less efficiently at high line and low-to-medium load since the switching loss is the dominant portion of the total losses in that operating condition. As the load increases, the dominant conduction losses help cut down the difference.
92 91 EFFICIENCY (%) 90 89 88 87 86 85 84 83 5 10 15 Iout (A) 20 25 30 VIN = 5.5V 4.5V 5.0V

Oscilloscope Multimeters Load

Current Probe Amplifier Fan

POPST-MOOREN TYP 4600X (4098547)

ISL6558EVAL2 OPERATION AND MODIFICATION TIPS ? Apply the input voltage (VIN) prior to the control voltage VCC5 (5V). This sequencing results in initializing the ISL6609 driver before the ISL6558 starts, and retains the soft-start interval. Vice versa, the ISL6558 could produce maximum duty cycle PWM drive signal, which results in an overcurrent or overvoltage trip due to lack of soft-start. The evaluation board is configured to power up from a single 5V supply, and it eliminates the problem discussed above. ? SW1 is used to engage or remove the load transient generator. ? Droop option is not selected in the reference design since the required load transient step is not greater than 50% of the full load. In another word, the droop only helps reduce the number of output capacitors and still retains the same transient performance when the load transient step is greater than 50% of full load. ? For 3-phase operation, add the current sense resistor R17 and place JP4 to ON position (away from TP8). The compensation gain (R11) should be scaled by 2/3 for system stability with a reasonable phase margin. ? For 4-phase operation, add the current sense resistors R2 & R17 and place JP4 &JP2 to ON position (away from TP8 and TP5). The compensation gain (R11) should be scaled by 1/2 for system stability with a reasonable phase margin. ? Use R25, R26, R28, and R29 to program the load transient speed. The higher values these resistors, the slower the transient. 4 http://oneic.com/

FIGURE 3. EFFICIENCY AT 500kHz AND 200LFM

AN1044.2 April 4, 2006

Application Note 1044
Figure 4 shows the efficiency for various frequencies and airflow conditions.
92 91 EFFICIENCY (%) 90 89 88 87 86 85 5 10 15 Iout (A) 20 25 30 IOUT VIN=VCC5 VO FSW = 500K, 200 LFM FSW = 465K, 200 LFM

FSW = 500K, 0 LFM

As shown in Figure 6, the converter is disabled when the control voltage (VCC5) is pulled below the POR falling threshold (3.88V nominal) of the ISL6558. The PGOOD signal falls low indicating the output voltage is out of regulation. The ISL6609 enters Tri-State? and holds both upper and lower drive signals low. The L-C resonant tank is broken and cannot cause negative ringing at the output since the lower FETs are turned off, blocking any negative current.

FIGURE 4. EFFICIENCY FOR VARIOUS FREQUENCY AND AIRFLOW AT VIN=5V

Different combinations of upper and lower MOSFETs have been evaluated at Vin = 5V and Fsw = 500kHz with 200LFM airflow, as shown in Table 5. The last combination with one Hitachi HAT2164 upper FET and two Siliconix Si4842DY lower FETs provides high efficiency and good thermal performance with some space and cost reduction.
TABLE 5. EFFICIENCY WITH DIFF. UPPER & LOWER MOSFETs # 1 2 3 4 UPPER FET HAT2168 x2 HAT2168 x1 HAT2168 x2 HAT2164 x1 LOWER FET HAT2164 x2 HAT2164 x2 Si4842DY x2 Si4842DY x2 EFFICIENCY 89.85% 87.94% 89.50% 88.90%

PGOOD

FIGURE 6. TURN-OFF WAVEFORMS

TRANSIENT RESPONSES A transient load generator is populated on the board to evaluate the response of the converter at high-speed load transients. Current setting of the generator provides about 6.5A load step with 160A/?s on the rising edge and 210A/?s on the falling edge without output droop configuration. The input current rises/falls at a speed limited by the input inductor and capacitors during step-up/step-down transients. Figure 7 shows a very low ramping up speed (0.02A/?s) of the input current at the load transient condition. This is due to a large effective input inductance seen by the converter. The effective input inductance is the sum of the on-board input inductance and the inductance of the long source leads of the bench power supply. The transient performance at different operating conditions has been summarized in Table 6. Little difference is noted for various line and load conditions. Note that the ripple portion has been included.
TABLE 6. TRANSIENT RESPONSE (6.5A STEP)

OUTPUT SOFT-START AND TURN-OFF As the control voltage VCC5 reaches the POR rising threshold (4.38V nominal) of the ISL6558, the FS/EN pin is released from ground; the output begins a monotonic rise comprised of 2048 digital steps, as shown in Figure 4. At the end of the soft-start interval, the PGOOD signal transitions to indicate the output voltage is within specification.

VIN=VCC5

VO

INPUT VOLTAGE/LOAD CURRENT 4.5V/0A 4.5V/25A

STEP-UP/DOWN 21.9mV/21.9mV 21.9mV/21.9mV 21.9mV/23.1mV 22.5mV/21.9mV 21.9mV/21.2mV 23.8mV/24.4mV

PGOOD

5.0V/0A 5.0V/25A

FIGURE 5. SOFT-START WAVEFORMS

5.5V/0A 5.5V/25A

5 http://oneic.com/

AN1044.2 April 4, 2006

Application Note 1044
VIN=5V

VO

VIN=5V

VO

IIN IO (5A/V)

IIN IO (5A/V)

FIGURE 7. TRANSIENT RESPONSE AT NO LOAD (VIN = 5.0V)

FIGURE 10. TRANSIENT RESPONSE AT 25A (VIN = 5.0V)

VIN=5V

VO

VIN=5V

VO

IO (5A/V)

IO (5A/V)

FIGURE 8. STEP-UP TRANSIENTS AT NO LOAD (VIN = 5.0V)

FIGURE 11. STEP-UP TRANSIENTS AT 25A (VIN = 5.0V)

VIN=5V

VO

VIN=5V

VO

IO (5A/V) IO (5A/V)

FIGURE 9. STEP-DOWN TRANSIENTS AT NO LOAD (VIN = 5.0V)

FIGURE 12. STEP-DOWN TRANSIENTS AT 25A (VIN = 5.0V)

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AN1044.2 April 4, 2006

Application Note 1044
OVER CURRENT AND SHORT CIRCUIT When the converter is momentarily shorted or overloaded, as shown in Figure 13, the converter enters hiccup mode with a narrow duty cycle and long switching period. PGOOD stays low during the overcurrent period; it indicates the output voltage is within regulation limits after the short is removed and the output completes a soft-start interval. As shown in Figure 14, the converter can sustain a permanent short circuit remaining in hiccup mode with a frequency of 185Hz. The average load current and the average power dissipation in each power component are reduced significantly; thus, the converter can stay at a short without causing any permanent damage or thermal issues. OVERVOLTAGE SHUTDOWN With the COMP pin momentarily tied to a 4V voltage source with respect to the ground, the error voltage jumps high and the duty cycle increases. Thus, the output voltage rises up immediately until it reaches the overvoltage threshold setting the OV latch and triggers the PWM outputs low. PGOOD is pulled low indicating output out of regulation, as shown in Figure 15.

VO

COMP

VO

IOUT

PGOOD

IO

FIGURE 15. OVERVOLTAGE WAVEFORMS

PGOOD

Conclusion
The superior performance of Intersil’s ISL6558 four-phase controller, coupled with Intersil’s ISL6609 driver, has been demonstrated in the low-profile reference design of a 40W, 500kHz interleaved DC/DC buck converter. An ultra high efficiency of 90% at 1.35V output and 30A full load has been achieved. The extensive experimental results give users a better understanding of the operation of the converter, the ISL6558 four-phase PWM controller, and the ISL6609 synchronousrectified driver.

FIGURE 13. OVER-LOADED OUTPUT WAVEFORMS

VO

IO

PGOOD

FIGURE 14. SHORT-CIRCUIT WAVEFORMS

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AN1044.2 April 4, 2006

Application Note 1044 Term Definitions
Cin Co D ?VIN,CAP ESR fc Fsw IIN IIN,RMS ILO ILo,PEAK ILo,PP ILo,RMS IPP Io IQ1,RMS IQ2,RMS Istep Lin Lo N Po η VIN Vo Input Capacitance Output Capacitance Ratio of ON Interval of Upper FET to SingleChannel Switching Period, Duty Cycle Allowable Input Voltage Ripple Contributed by the Input Capacitors Overall ESR of Output Capacitors System Closed-Loop Bandwidth Per-Channel Switching Frequency Input Current RMS Current thru Input Capacitors Current thru Each-Channel Inductor Peak Current thru Each-Channel Inductor Ripple Current thru Each-Channel Inductor RMS Current thru Each-Channel Inductor Overall Ripdple Current thru Output Capacitors Output Load Current RMS Current thru Upper FET, Q1 RMS Current thru Upper FET, Q2 Load Transient Step Input Inductor Inductance of Each-Channel Inductor Number of Active Channels Output Power Output Efficiency Input Voltage Output Voltage

References
Intersil documents are available on the web at http://www.intersil.com. [1] Intersil’s ISL6558 Data Sheet. [2] Intersil’s ISL6609 Data Sheet. [3] Intersil’s ISL6557A Data Sheet

Appendix
1. Schematics of Reference Design and Load Transient Generator. 2. Bill of Materials and Layout of Evaluation Board.

8 http://oneic.com/

AN1044.2 April 4, 2006

REMOVE JUMPER FOR 12V INPUT J2 5V B J4 12V D1 MBR0530T1 D2 MBR0530T1

JP1

DNP

DNP

DNP

DNP

4

8

LGATE PHASE

UGATE

C10 100u, 16V GND VCC12 REVERSE BIASING PROTECTION

5

J3

GND TP3

C11 1u

7

4

GND9

GND

R37 499K JP2 R2 909, DNP C13 DNP R3 0

6 9 ISL6505CR

5

Q4 4 1 2 3 C12 1u 5 3 2 1 4 Q5 C14 22u PHASE1 L3 3 2 1 4 5 Q8 1 2 3 2 3 NC 1 NC 4 PHASE 1 TP4

9

3

VCC5

THIS CIRCUITRY GOES OUTSIDE OF THE IMPLEMENTATION AREA.

R4 1k R6 1k 1

CR1
GREEN

R5 10k 2 3 Q7 2N7002 2

VCC5

IC_GND R7 909 DNP C16 IC_GND R38 499K R8 0 C15 1u 10k,DNP R9 1 2 8 7 U2 VCC5 6 5

4

3
RED

4

1 PGOOD TP5

LGATE PHASE

UGATE

Q6 5

1 2 3

GND

6 9 ISL6505CR

5

PLACE CR1 ON TOP LAYER

GND9

9

3

Q10 C17 1u U3 5 4

TP6 C18 0.1uF IC_GND C20 10n C22 DNP R11 6.04k JP3 Jumper, DNP 1 2 3 4 5

3 2 1

1 2 3

COMP

VCC5

4

20 19 18 17 16 21

PGD VCC19 VCC18 PWM4 ISEN4 GND21

LGATE PHASE

N/C6 FS/EN GND8 GND9 PWM3

UGATE

C21 1u

R10 1 2

8

7

BOOT GND9 PWM

EN

4

6 5

GND

VCC

Q12 4 5 Q13 1 2 3 1 2 3

5

6 7 8 9 10

9

3

R14 51.1K

909 C23 DNP IC_GND

4

4

8

7

GND9

IC_GND IC_GND

2 ISL6505CR 6 9

GND

PWM

VCC

5

4

R41 DNP

R23 499

LGATE PHASE

UGATE

1

IC_GND R40 499K

BOOT

EN

6

5

5

Q17 4 1 2 3

9

3

MAKE THIS CONNECTION NEAR THE VOUT POSITIVE TERMINAL OF C89, TP9
R24

4

0 IC_GND

GROUND IC TO THE NEGATIVE TERMINAL OF C89, TP9
GND

Pull Down PWM pin during startup so that the output can rise monitonically when the input turns on/off repetitively and rapidly.

C28 1u

1 2 3

http://oneic.com/ 9
AN1044.2 April 4, 2006

UPPER FETS: HAT2164H, Si4842DY, Si7868DP INPUT VOLTAGE VIN > 4.0V DURING TP1 LOAD TRANSIENT
J1 VIN VIN

INPUT CAPACITORS: PANASONIC EEFUE0J181R 6.3V, 180uF
L1 2 3 NC 300nH 1 NC 4 C2 C3 C4 C5 C6 C7 C8 C9 VIN_F DNPs for 60A and large load step application 10k, DNP R1 5

LOWER FETS: HAT2168H, Si4842DY
Q1 3 2 1

BOTH UPPER AND LOWER FETS USE "LFPAK" FOOTPRINT
C1 22u, DNP PHASE 4 TP2

PHASE4 U1 VCC5 6 5 Q2 5 3 2 1 4

VCC5

L2 1 4 NC

2 NC 3

VOUT

1 2

BOOT PWM

EN

Q3

ETQP2H0R3BFA

DCR=0.54mOhm

300nH

VCC

300nH

Application Note 1044

BOOT PWM

EN

VCC

4 Q9 4

PHASE 2 TP7

IC_GND 10k, DNP 15 14 13 12 11 U4 VCC5 Q11 5 3 2 1 C19 22u PHASE2 2 3 NC L4 1 NC 4

COMP N/C2 DROOP FB VSEN

ISEN1 PWM1 PWM2 ISEN2 ISEN3

300nH

ISL6558IR

R12

R13 0

R39 499K

6 9 ISL6505CR

4 C24 1u Q14 5 3 2 1

R16 750 R19 499 C100 DNP R21 750 R22 22.1k JP4 R15 22.1k IC_GND VCC5 R17 909, DNP R18 0 C27 1u 10k, DNP U5 VCC5 Q15 5 3 2 1

22u, DNP

PHASE 3 TP8

C25

C26 DNP

R20

PHASE3 L5 Q16 2 3 NC 1 NC 4

4

300nH

Intersil Corporation
Endura Power Management 4020 Sturrup Creek Drive Durham, NC 27703 Size Custom Date: Title ISL6558EVAL2, 5V-TO-1.35V@30A, 500kHz Sheet 1 of 2 Rev B

PHASE 3 AND 4 ARE USED FOR 60A APPLICATION

Wednesday, November 20, 2002

C91 22uF

C92 22uF

C93 22uF

C94 22uF

C95 22uF

C96 22uF

C97 22uF

C98 DNP

C99 DNP

1 2 3 4

U6 VDD HB HO HS HIP2100IB LO VSS LI HI

8 7 6 5 SW1 1 2 TURN OFF ONE R30 10k 3

R25 3

D3 1

R27 10k R26 10

VOUT TP9 VOUT MOVE C89 CLOSE TO TP13 TP10 C79 1uF

R28 3

D4 1

4

4

3

4

VCC12 C80 22uF C81 22uF C82 22uF C83 22uF C84 22uF C85 22uF C86 22uF C87 22uF C88 22uF C89 1uF

R31 46.4k R34 1k

3

1 2

3

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AN1044.2 April 4, 2006

OUTPUT CAPACITORS: PANASONIC EEFUE0D391XR 2V, 390uF

MAKE THE FOOTPRINT FIT FOR SMT1812 TOO
J5 1 VOUT

VOUT C30 DNP C31 C32 C33 C34 C35 390uF C36 390uF C37 390uF C38 DNP C39 C40 C41 C42

J6 1 GND

C45 DNP

C46

C47

C48

C49

C50

C51

C52

C53

C54

C55

C56

C57

DNPs for 60A and large load step

application

C59 DNP

C60 DNP

C61 DNP

C62 22uF

C63 22uF

C64 22uF

C65 22uF

C66 DNP

C67 DNP

C68 51.1 Ohm, DNP

Bleed the current from the boot resistor (10k) at shutdown mode; it can be removed for application with such a similar resistive load.

C69 DNP

C70 DNP

C71 22uF

C72 DNP

C73 22uF

C74 22uF

C75 22uF

C76 DNP

C77 DNP

C78 DNP

TRANSIENT GENERATOR AND LOAD. THIS CIRCUITRY GOES OUTSIDE OF THE IMPLEMENTATION AREA.

Application Note 1044

VCC12

Q18 HUF761

Q19 HUF7_1

TP11 TRANS. LO

R29 10

1uF makes load transient worse according the simulation.

R32 0.1

R33 DNP

6.5A STEP
Q20 2N7002 C90 10uF R35 0.1 R36 DNP

Intersil Corporation
Endura Power Management 4020 Sturrup Creek Drive Durham, NC 27703 Size Custom Date: Title ISL6558EVAL2, 5V-TO-1.35V@30A, 500kHz Sheet 2 of 2 Rev B

Thursday, December 26, 2002

分销商库存信息:
INTERSIL ISL6558EVAL2


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