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MPY634

Wide Bandwidth PRECISION ANALOG MULTIPLIER

FEATURES

q WIDE BANDWIDTH: 10MHz typ q ±0.5% MAX FOUR-QUADRANT ACCURACY q INTERNAL WIDE-BANDWIDTH OP AMP q EASY TO USE q LOW COST

DESCRIPTION

The MPY634 is a wide bandwidth, high accuracy, four-quadrant analog multiplier. Its accurately lasertrimmed multiplier characteristics make it easy to use in a wide variety of applications with a minimum of external parts, often eliminating all external trimming. Its differential X, Y, and Z inputs allow configuration as a multiplier, squarer, divider, square-rooter, and other functions while maintaining high accuracy. The wide bandwidth of this new design allows signal processing at IF, RF, and video frequencies. The internal output amplifier of the MPY634 reduces design complexity compared to other high frequency multipliers and balanced modulator circuits. It is capable of performing frequency mixing, balanced modulation, and demodulation with excellent carrier rejection. An accurate internal voltage reference provides precise setting of the scale factor. The differential Z input allows user-selected scale factors from 0.1 to 10 using external feedback resistors.

+VS –VS Transfer Function V-I X2 Multiplier Core Y1 V-I Y2 A VOUT Precision Output Op Amp VOUT = A (X1 – X2)(Y1 – Y2) SF – (Z1 – Z2)

APPLICATIONS

q PRECISION ANALOG SIGNAL PROCESSING q MODULATION AND DEMODULATION q VOLTAGE-CONTROLLED AMPLIFIERS q VIDEO SIGNAL PROCESSING q VOLTAGE-CONTROLLED FILTERS AND OSCILLATORS

SF

Voltage Reference and Bias

X1

Z1 V-I Z2 0.75 Atten

International Airport Industrial Park ? Mailing Address: PO Box 11400 ? Tucson, AZ 85734 ? Street Address: 6730 S. Tucson Blvd. ? Tucson, AZ 85706 Tel: (520) 746-1111 ? Twx: 910-952-1111 ? Cable: BBRCORP ? Telex: 066-6491 ? FAX: (520) 889-1510 ? Immediate Product Info: (800) 548-6132

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1985 Burr-Brown Corporation

1 PDS-636D

Printed in U.S.A. December, 1995

MPY634

SPECIFICATIONS

ELECTRICAL

At TA = +25°C and VS = ±15VDC, unless otherwise noted. MPY634KP/KU MODEL MULTIPLIER PERFORMANCE Transfer Function Total Error(1) (–10V ≤ X, Y ≤ +10V) TA = min to max Total Error vs Temperature Scale Factor Error (SF = 10.000V Nominal)(2) Temperature Coefficient of Scaling Voltage Supply Rejection (±15V ±1V) Nonlinearity X (X = 20Vp-p, Y = 10V) Y (Y = 20Vp-p, X = 10V) Feedthrough(3) X (Y Nulled, X = 20Vp-p, 50Hz) Y (X Nulled, Y = 20Vp-p, 50Hz) Both Inputs (500kHz, 1Vrms) Unnulled Nulled Output Offset Voltage Output Offset Voltage Drift DYNAMICS Small Signal BW, (VOUT = 0.1Vrms) 1% Amplitude Error (CLOAD = 1000pF) Slew Rate (VOUT = 20Vp-p) Settling Time (to 1%, ?VOUT = 20V) NOISE Noise Spectral Density: SF = 10V Wideband Noise: f = 10Hz to 5MHz f = 10Hz to 10kHz OUTPUT Output Voltage Swing Output Impedance (f ≤ 1kHz) Output Short Circuit Current (RL = 0, TA = min to max) Amplifier Open Loop Gain (f = 50Hz) INPUT AMPLIFIERS (X, Y and Z) Input Voltage Range Differential VIN (VCM = 0) Common-Mode VIN (VDIFF = 0) (see Typical Performance Curves) Offset Voltage X, Y Offset Voltage Drift X, Y Offset Voltage Z Offset Voltage Drift Z CMRR Bias Current Offset Current Differential Resistance DIVIDER PERFORMANCE Transfer Function (X1 > X2) Total Error (1) untrimmed (X = 10V, –10V ≤ Z ≤ +10V) (X = 1V, –1V ≤ Z ≤ +1V) (0.1V≤ X ≤ 10V, –10V ≤ Z ≤ 10V) SQUARE PERFORMANCE Transfer Function Total Error (–10V ≤ X ≤ 10V) * * * * MIN TYP MAX MIN MPY634AM TYP MAX MIN MPY634BM TYP MAX MIN MPY634SM TYP MAX UNITS

* ±2.0

(X1 – X2) (Y1 – Y2) 10V ±1.5 ±0.022 ±0.1 ±0.01 ±0.01 ±0.4 ±0.01 ±0.3 ±0.01 45 55 ±100 55 65 ±5 ±200

+ Z2 ±1.0

* ±0.5

* * ±2.0 ±0.02 * * * ±0.3 ±0.1 ±0.3 ±0.1 * * ±15 * * * * * * * * % % %/°C % %/°C % % % % % dB dB mV ?V/°C

±2.5 ±0.03 ±0.25 ±0.02 * * * * * 40(4) 55(4) 50 60 ±50 *

±1.0 ±0.015 * ±0.01 * 0.2 * ±0.15 * * 60 60 70 * ±100

±30

* ±500

6(4)

* * * *

8

10 100 20 2

*

* * * *

6

* * * *

MHz kHz V/?s ?s

* * * ±11

0.8 1 90 * 0.1 30 85

* * * * * * *

* * *

?V/√Hz mVrms ?Vrms V ? mA dB

* * *

* * ±25 200 ±25 * * * * * * 1.5 4.0 5.0 * ±1.2 ±100 ±100 60 *

±12 ±10 ±5 100 ±5 200 80 0.8 0.1 10 (Z2 – Z1) (X1 – X2) ±0.75 ±2.0 ±2.5 (X1 – X2) 2 10V ±0.6 + Z2 ±20 ±30 70 2.0

* * ±2 50 ±2 100 90 * * * * ±0.35 ±1.0 ±1.0 * ±0.3 ±10 ±15 * *

* * * * * * * * * * ±0.75 * * * * * * 500 * 2.0

V V mV ?V/°C mV ?V/°C dB ?A ?A M?

*

10V

+ Y1

% % %

%

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MPY634

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SPECIFICATIONS (CONT)

ELECTRICAL

At TA = +25°C and VS = ±15VDC, unless otherwise noted. MPY634KP/KU MODEL SQUARE-ROOTER PERFORMANCE Transfer Function (Z1 ≤ Z2) Total Error(1) (1V ≤ Z ≤ 10V) POWER SUPPLY Supply Voltage: Rated Performance Operating Supply Current, Quiescent TEMPERATURE RANGE Specification Storage MIN TYP MAX MIN MPY634AM TYP MAX MIN MPY634BM TYP MAX MIN MPY634SM TYP MAX UNITS

√10V (Z2 – Z1) +X2 * ±2.0 ±1.0 * ±0.5 * * %

* * * *(5) –40 * * *(5) +85 ±8

±15 4

* ±18 6 +85 +150 * * * * * * * * *

* * –55 * ±20 * +125 *

VDC VDC mA °C °C

–25 –65

* Specification same as for MPY634AM. NOTES: (1) Figures given are percent of full scale, ±10V (i.e., 0.01% = 1mV). (2) May be reduced to 3V using external resistor between –VS and SF. (3) Irreducible component due to nonlinearity; excludes effect of offsets. (4) KP grade only. (5) KP grade only. 0°C to +70°C for KU grade.

PIN CONFIGURATIONS

Top View

X1 Input X1 X2 SF Y1 2 3 Y2 4 5 –VS TO-100: MPY634AM/BM/SM 6 10 1 9 +VS 8 7 Z2 Out Scale Factor Z1 NC Y1 Input Y2 Input 4 5 6 7 DIP: MPY634KP 11 Z1 Input 10 Z2 Input 9 8 NC –VS NC Y1 Input Y2 Input NC 5 6 7 8 SOIC: MPY634KU X1 Input X2 Input NC 1 2 3 14 +VS 13 NC 12 Output X2 Input NC Scale Factor 1 2 3 4 16 +VS 15 NC 14 Output 13 Z1 Input 12 Z2 Input 11 NC 10 –VS 9 NC

ABSOLUTE MAXIMUM RATINGS

PARAMETER Power Supply Voltage Power Dissipation Output Short-Circuit to Ground Input Voltage ( all X, Y and Z) Temperature Range: Operating Storage Lead Temperature (soldering, 10s) SOIC ‘KU’ Package MPY634AM/BM MPY634KP/KU ±18 500mW Indefinite ±VS –25°C/+85°C –65°C/+150°C +300°C * * * * * –40°C/+85°C * +260°C MPY634SM ±20 * * * –55°C/+125°C * *

ORDERING INFORMATION

MPY634 Basic Model Number Performance Grade(1) K: –25°C to +85°C (‘U’ package 0°C to +70°C) A: –25°C to +85°C B: –25°C to +85°C S: –55°C to +125°C Package Code M: TO-100 Metal P: Plastic 14-pin DIP U: 16-pin SOIC NOTE: (1) Performance grade identifier may not be marked on the SOIC package; a blank denotes “K” grade. ( ) ( )

* Specification same as for MPY634AM/BM.

PACKAGE INFORMATION

PACKAGE DRAWING MODEL PACKAGE NUMBER(1) MPY634KP 14-Pin PDIP 010 MPY634KU 16-Pin SOIC 211 MPY634AM TO-100 007 MPY634BM TO-100 007 MPY634SM TO-100 007 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book.

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MPY634

TYPICAL PERFORMANCE CURVES

TA = +25°C, VS = ±15VDC, unless otherwise noted. FEEDTHROUGH vs FREQUENCY –20

Feedthrough Attenuation (dB)

FREQUENCY RESPONSE AS A MULTIPLIER 10 Normal Connection CL = 1000pF

–40

Output Response (dB)

0 CL = 0pF –10 With X10 Feedback Attenuator –20

–60

X Feedthrough

–80

Y Feedthrough

–100 100 1k 10k 100k Frequency (Hz) 1M 10M 100M

–30 1k 10k 100k 1M 10M 100M Frequency (Hz)

COMMON-MODE REJECTION RATIO vs FREQUENCY 90 –50 80 70 Typical for all inputs

FEEDTHROUGH vs TEMPERATURE

Feedthrough Attenuation (dB)

CMRR (dB)

60 50 40 30 20 10 0 100 10k 100M Frequency (Hz) 1M 10M

–60

fY = 500kHz VX = nulled

–70 nulled at 25°C

–80 –60 –40 –20 0 20 40 60 80 100 120 140 Temperature (°C)

NOISE SPECTRAL DENSITY vs FREQUENCY 1.5

Noise Spectral Density (?V/√Hz)

FREQUENCY RESPONSE AS A DIVIDER 60 VX = 100mVDC VZ = 10mVrms VX = 1VDC VZ = 100mVrms VX = 10VDC VZ = 100mVrms 0

Output, V0 / V2 (dB)

1.25

40

1

20

0.75

0.5 10 100 1k Frequency (Hz) 10k 100k

–20 1k 10k 100k 1M 10M 100M Frequency (Hz)

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.

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MPY634

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TYPICAL PERFORMANCE CURVES (CONT)

TA = +25°C, VS = ±15VDC, unless otherwise noted. INPUT DIFFERENTIAL-MODE/ COMMON-MODE VOLTAGE 10 VCM

INPUT/OUTPUT SIGNAL RANGE vs SUPPLY VOLTAGES 14

Peak Positive or Negative Signal (V)

12 Output, RL ≥ 2k? 10 All inputs, SF = 10V 8

5

Specified Accuracy 5 VS = ±15V 10 12 VDIFF

–12

–10

–5

–5

6 4 8 10 12 14 16 18 20 Positive or Negative Supply (V)

–10 Functional Derated Accuracy

BIAS CURRENTS vs TEMPERATURE (X,Y or Z Inputs) 800 700

Bias Current (nA)

600 500 Scaling Voltage = 10V 400 300 Scaling Voltage = 3V 200 100 0 –60 –40 –20 0 20 40 60 80 100 120 140 Temperature (°C)

THEORY OF OPERATION

The transfer function for the MPY634 is: VOUT = A where: A = open-loop gain of the output amplifier (typically 85dB at DC). SF = Scale Factor. Laser-trimmed to 10V but adjustable over a 3V to 10V range using external resistors. X, Y, Z are input voltages. Full-scale input voltage is equal to the selected SF. (Max input voltage = ±1.25 SF). An intuitive understanding of transfer function can be gained by analogy to the op amp. By assuming that the open-loop gain, A, of the output operational amplifier is infinite, (X1 – X2) (Y1 – Y2) SF – (Z1 – Z2)

inspection of the transfer function reveals that any VOUT can be created with an infinitesimally small quantity within the brackets. Then, an application circuit can be analyzed by assigning circuit voltages for all X, Y and Z inputs and setting the bracketed quantity equal to zero. For example, the basic multiplier connection in Figure 1, Z1 = VOUT and Z2 = 0. The quantity within the brackets then reduces to: (X1 – X2) (Y1 – Y2) SF – (VOUT – 0) = 0

This approach leads to a simple relationship which can be solved for VOUT to provide the closed-loop transfer function. The scale factor is accurately factory adjusted to 10V and is typically accurate to within 0.1% or less. The scale factor may be adjusted by connecting a resistor or potentiometer between pin SF and the –VS power supply. The value of the external resistor can be approximated by:

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MPY634

10 – SF Internal device tolerances make this relationship accurate to within approximately 25%. Some applications can benefit from reduction of the SF by this technique. The reduced input bias current, noise, and drift achieved by this technique can be likened to operating the input circuitry in a higher gain, thus reducing output contributions to these effects. Adjustment of the scale factor does not affect bandwidth. The MPY634 is fully characterized at VS = ±15V but operation is possible down to ±8V with an attendant reduction of input and output range capability. Operation at voltages greater than ±15V allows greater output swing to be achieved by using an output feedback attenuator (Figure 1). As with any wide bandwidth circuit, the power supplies should be bypassed with high frequency ceramic capacitors. These capacitors should be located as near as practical to the power supply connections of the MPY634. Improper bypassing can lead to instability, overshoot, and ringing in the output.

RSF = 5.4k?

SF

X Input ±10V FS ±12V PK +15V 470k? 50k? –15V Optional Offset Trim Circuit 1k? Y1 Z2 Optional Summing Input, Z, ±10V PK X1 +VS +15V

X2

Out =

VOUT, ±12V PK (X1 – X2) (Y1 – Y2) 10V + Z2

MPY634 SF Z1

Y Input ±10V FS ±12V PK

Y2

–VS

–15V

FIGURE 2. Basic Multiplier Connection. increase in output offset voltage. The larger output offset may be reduced by applying a trimming voltage to the high impedance input, Z2. The flexibility of the differential Z inputs allows direct conversion of the output quantity to a current. Figure 3 shows the output voltage differentially-sensed across a series resistor forcing an output-controlled current. Addition of a capacitor load then creates a time integration function useful in a variety of applications such as power computation.

X Input ±10V FS ±12V PK

X1

+VS

+15V

VOUT, ±12V PK = (X1 – X2) (Y1 – Y2) (Scale = 1V)

X2

Out

X Input ±10V FS ±12V PK X1 +VS +15V IOUT = X2 Out (X1 – X2) (Y1 – Y2) 10V x 1 RS MPY634 SF Z1 Current Sensing Resistor, RS, 2k? min

MPY634 SF Z1 90k? Optional Peaking Capacitor CF = 200pF

Y Input ±10V FS ±12V PK

Y1

Z2 10k?

Y2

–VS

–15V

Y1 Z2

FIGURE 1. Connections for Scale-Factor of Unity. BASIC MULTIPLIER CONNECTION Figure 2 shows the basic connection as a multiplier. Accuracy is fully specified without any additional user-trimming circuitry. Some applications can benefit from trimming of one or more of the inputs. The fully differential inputs facilitate referencing the input quantities to the source voltage common terminal for maximum accuracy. They also allow use of simple offset voltage trimming circuitry as shown on the X input. The differential Z input allows an offset to be summed in VOUT. In basic multiplier operation, the Z2 input serves as the output voltage ground reference and should be connected to the ground of the driven system for maximum accuracy. A method of changing (lowering) SF by connecting to the SF pin was discussed previously. Figure 1 shows an alternative method of changing the effective SF of the overall circuit by using an attenuator in the feedback connection to Z1. This method puts the output amplifier in a higher gain and is thus accompanied by a reduction in bandwidth and an

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Y Input ±10V FS ±12V PK

Y2

–VS

–15V

Integrator Capacitor (see text)

FIGURE 3. Conversion of Output to Current. SQUARER CIRCUIT (FREQUENCY DOUBLER) Squarer, or frequency doubler, operation is achieved by paralleling the X and Y inputs of the standard multiplier circuit. Inverted output can be achieved by reversing the differential input terminals of either the X or Y input. Accuracy in the squaring mode is typically a factor of two better than the specified multiplier mode with maximum error occurring with small (less than 1V) inputs. Better accuracy can be achieved for small input voltage levels by reducing the scale factor, SF. DIVIDER OPERATION The MPY634 can be configured as a divider as shown in Figure 4. High impedance differential inputs for the numerator and denominator are achieved at the Z and X inputs, Hello 6

MPY634

respectively. Feedback is applied to the Y2 input, and Y1 is normally referenced to output ground. Alternatively, as the transfer function implies, an input applied to Y1 can be summed directly into VOUT. Since the feedback connection is made to a multiplying input, the effective gain of the output op amp varies as a function of the denominator input voltage. Therefore, the bandwidth of the divider function is proportional to the denominator voltage (see Typical Performance Curves).

Output, ±12V PK VOUT = 10V(Z2 – Z1) + X2 +15V X1 Optional Summing Input, X, ±10V PK +VS Reverse this and X inputs for Negative Outputs

X2

Out

RL (Must be Provided)

MPY634 SF Z1 Z Input 10V FS 12V PK

Output, ±12V PK + X Input (Denominator) 0.1V ≤ X ≤ 10V – X1 +VS +15V VOUT = X2 Out 10V(Z2 – Z1) (X1 – X2) + Y1

Y1

Z2

Y2

–VS

–15V

MPY634 Optional Summing Input ±10V PK SF Z1 Z Input (Numerator) ±10V FS, ±12V PK

FIGURE 5. Square-Rooter Connection.

APPLICATIONS

A sin (2π 10MHz t) X1 +VS +15V 1k? X2 Out 0.1?F RX VO = (AB/20) cos θ

Y1

Z2

Y2

–VS

–15V

FIGURE 4. Basic Divider Connection. Accuracy of the divider mode typically ranges from 1.0% to 2.5% for a 10 to 1 denominator range depending on device grade. Accuracy is primarily limited by input offset voltages and can be significantly improved by trimming the offset of the X input. A trim voltage of ±3.5mV applied to the “low side” X input (X2 for positive input voltages on X1) can produce similar accuracies over 100 to 1 denominator range. To trim, apply a signal which varies from 100mV to 10V at a low frequency (less than 500Hz). An offset sine wave or ramp is suitable. Since the ratio of the quantities should be constant, the ideal output would be a constant 10V. Using AC coupling on an oscilloscope, adjust the offset control for minimum output voltage variation. SQUARE-ROOTER A square-rooter connection is shown in Figure 5. Input voltage is limited to one polarity (positive for the connection shown). The diode prevents circuit latch-up should the input go negative. The circuit can be configured for negative input and positive output by reversing the polarity of both the X and Y inputs. The output polarity can be reversed by reversing the diode and X input polarity. A load resistance of approximately 10k? must be provided. Trimming for improved accuracy would be accomplished at the Z input.

MPY634 SF B sin (2π 10MHz t + θ) Y1 Z2 Z1

Y2

–VS

–15V

Multiplier connection followed by a low-pass filter forms phase detector useful in phase-locked-loop circuitry. RX is often used in PLL circuitry to provide desired loop-damping characteristics.

FIGURE 6. Phase Detector.

+15V + EC – 2k? –15V + ES – Y2 –VS –15V Minor gain adjustments are accomplished with the 1k? variable resistor connected to the scale factor adjustment pin, SF. Bandwidth of this circuit is limited by A1, which is operated at relatively high gain. Y1 2k? X2 VO A1 39k? X1 +VS VO = 10 ? EC ? ES OPA606

MPY634 SF Z1

Z2

1k?

FIGURE 7. Voltage-Controlled Amplifier.

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MPY634

Modulation Input, ±EM X1

X1 +VS +15V

+VS

+15V

X2

X2 18k? 10k? Y1 Z2 3k? Y2 –VS –15V Out 4.7k? VOUT = (10V) sinθ Where θ = (π/2) (Eθ /10V)

Out VOUT = 1 ± (EM/10V) EC sin ωt

MPY634 SF Carrier Input EC sin ωt Y1 Z2 Z1

MPY634 SF Z1

4.3k?

Input, Eθ 0 to +10V

Y2

–VS

–15V

With a linearly changing 0-10V input, this circuit’s output follows 0° to 90° of a sine function with a 10V peak output amplitude.

By injecting the input carrier signal into the output through connection to the Z2 input, conventional amplitude modulation is achieved. Amplification can be achieved by use of the SF pin, or Z attenuator (at the expense of bandwidth).

FIGURE 8. Sine-Function Generator.

FIGURE 9. Linear AM Modulator.

X1

+VS

+15V (A2/20) cos (2 ω t)

X2 A sin ω t

Out C R

MPY634 SF Z1

Y1

Z2

Y2

–VS

–15V

Frequency Doubler Input Signal: 20Vp-p, 200kHz Output Signal: 10Vp-p, 400kHz

Squaring a sinusoidal input creates an output frequency of twice that of the input. The DC output component is removed by AC-coupling the output.

FIGURE 10. Frequency Doubler.

Modulation Input, ±EM

X1

+VS

+15V

X2 470k? Carrier Null +15V 1k?

Out

VOUT

MPY634 SF Z1

–15V Y1 Z2

Carrier Input EC sin ω t

Y2

–VS

–15V

The basic muliplier connection performs balanced modulation. Carrier rejection can be improved by trimming the offset voltage of the modulation input. Better carrier rejection above 2MHz is typically achieved by interchanging the X and Y inputs (carrier applied to the X input).

Carrier: fC = 2MHz, Amplitude = 1Vrms Signal: fS = 120kHz, Amplitude = 10V peak

FIGURE 11. Balanced Modulator.

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MPY634

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